Graphcore

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Hardware Validation and Debug Engineer - DDR

Added

16 days ago

Location

🇬🇧 Bristol

Type

Full time

Salary

Salary not provided

Related skills

hardware debug lpddr validation and tuning signal integrity analysis ddr training and margin analysis protocol-level debugging

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📋 Description

Validate and debug new hardware platforms
Debug PCB, power, signal integrity, interfaces
Validate and debug LPDDR5-9600 memory interfaces
Debug SPI/I2C/I3C/UART
Support LPDDR5-9600 init, timing, margin, stability
Analyze DDR timing margins, eye diagrams, training behavior

🎯 Requirements

Hardware Debug
LPDDR validation and tuning
Signal integrity analysis
DDR training and margin analysis
Protocol-level debugging
Root-cause analysis

🎁 Benefits

Competitive salary and benefits package
Inclusive work environment
Flexible interview adjustments available

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