Senior Staff Digital Design Engineer

📋 Description

• Lead digital design for next-gen RFID reader ICs from architecture to tapeout
• Develop micro-architectures, executable models, and RTL for complex subsystems
• Collaborate with chip architects and RF/analog engineers on mixed-signal architectures
• Coordinate with verification and physical design for timing, signal integrity
• Define DFT strategies including scan, BIST, and boundary scan
• Improve ASIC/SoC design flows with CAD/EDA teams

🎯 Requirements

• Bachelor’s in Computer Engineering or related field; 12+ years exp; or 8+ years with MS or 5+ years
• 12+ years RTL design exp; 2–3 complete tapeouts; mixed-signal/RF IC exp preferred
• Strong digital logic, micro-architecture, synthesis, timing closure
• Verilog/SystemVerilog proficiency for RTL, modeling, verification
• CDC analysis, clock gating, low-power design (UPF/CPF), STA
• UVM verification, functional coverage, assertions; DFT (scan, MBIST, ATPG)

🎁 Benefits

• Base salary: $158,700–$238,100 USD across the United States
• Additional compensation: Merit increases, bonuses, stock awards
• Retirement: 401(k) with company matching
• Healthcare: Comprehensive benefits for U.S.-based employees
• Flexible work: Remote-eligible in the United States
• Paid time off: Open PTO policy