Design high-speed analog and mixed-signal SerDes circuits.
Architect, simulate, and optimize SerDes blocks: transmitters, receivers, equalizers, clocks.
Implement transistor-level design using FinFET technologies.
Schematic, pre/post-layout simulations, and corner analysis.
Analyze performance across PVT variations.
Collaborate with layout and verification teams for robust designs.

🎯 Requirements

BS or MS in Electronics, Electrical, Microelectronics, or VLSI.
1–5 years in analog, mixed-signal, or high-speed circuit design.
Strong CMOS analog fundamentals and device physics.
Experience with FinFET technologies.
Familiarity with IC design flow from spec to silicon.
Proficiency with Cadence Virtuoso/Spectre and SPICE.

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