Hardware Validation & Debug Engineer - DDR

Added
8 hours ago
Type
Full time
Salary
Salary not provided

Related skills

signal integrity bert oscilloscope lpddr5 ddr
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๐Ÿ“‹ Description

  • Validate memory and system interfaces for advanced AI compute under real product conditions
  • Create and execute validation and debug plans for new hardware platforms
  • Focus on LPDDR5-9600, slow-speed interfaces, PCB issues, power behaviour and signal integrity
  • Investigate failures, tune memory subsystems, and turn complex findings into clear actions across
  • Own bring-up activity, drive root cause analysis, and keep issues moving across teams
  • Speak up, challenge assumptions, and help teams choose the right corrective action

๐ŸŽฏ Requirements

  • Strong hands-on hardware debug experience, including board bring-up and subsystem debug
  • Experience validating and tuning LPDDR memory subsystems, ideally including LPDDR5
  • Ability to debug PCB, power, signal integrity and interface issues through to root cause
  • Knowledge of DDR training, timing optimisation, margin analysis, eye diagrams and stability
  • Confident use of lab instrumentation, including high-bandwidth oscilloscopes, BERT systems and
  • Ability to work independently, take responsibility and drive issue resolution across hardware and

๐ŸŽ Benefits

  • Flexible working
  • Generous leave
  • Retirement planning support (up to 5% matched pension)
  • Phantom equity
  • Workplace experience (free food, on-site barista)
  • Income protection and life assurance
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