ML Silicon Performance Lead

📋 Description

• Drive hardware/software co-design across ML research, compiler, and silicon teams, jointly shaping
• Partner with ML research to translate model and workload needs into kernel performance targets and
• Map and optimize ML kernels for architecture, using insights from data movement, memory hierarchy
• Co-design support for new data structures and quantization formats across kernels, compilers, and
• Define and help develop specialized acceleration IP, working with compiler and silicon partners to
• Drive ML performance modeling and simulation with the compiler team to compare hardware/software

🎯 Requirements

• Deep experience with ML accelerator architecture and how compute resources, memory systems, and
• Ability to translate model-level behavior into concrete kernel requirements and hardware design
• Experience building or using accelerator performance models and simulators, and validating their
• Hands-on experience optimizing ML kernels, including identifying bottlenecks and improving
• Understanding of quantization and numerical formats, including implications for model quality
• Experience with hardware/software co-design and reasoning about whether a capability belongs in a

🎁 Benefits

• Offers Equity