Research Engineer, Chip Design RL

📋 Description

• Invent, design, and implement RL environments and evaluations for agentic RTL generation, design
• Work on cross-cutting RL considerations such as EDA-tool latency optimization and proxy rewards.
• Conduct experiments and shape our roadmap.
• Deliver your work into research and production training runs.
• Collaborate with other researchers and engineers across and outside Anthropic.

🎯 Requirements

• Expertise in ASIC or FPGA design: RTL, design verification (UVM, formal methods, coverage-driven)
• Fluency with industry EDA tools and processes.
• Experience taping out chips and going from spec to silicon.
• Ability to balance research exploration with engineering implementation.
• Passionate about AI's potential and committed to developing safe and beneficial systems.
• Strong candidates may also have: Experience with reinforcement learning, evaluations or

🎁 Benefits

• Competitive compensation and benefits
• Optional equity donation matching
• Generous vacation and parental leave
• Flexible working hours
• Lovely office space in which to collaborate with colleagues