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12 minutes ago
Type
Full time
Salary
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security hardware verilog systemverilog rtl
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๐Ÿ“‹ Description

  • Own architecture, microarchitecture, and implementation of silicon IP and subsystems, from
  • Define hardware interfaces, data flows, and microarchitectural tradeoffs to meet functional
  • Partner closely with OpenAIโ€™s Security team to translate security architecture, requirements, and
  • Design and integrate hardware security mechanisms, including encryption, key management, access
  • Evaluate architectural and implementation tradeoffs to ensure security capabilities meet functional
  • Collaborate with silicon architects, RTL, verification, firmware, and software teams to drive

๐ŸŽฏ Requirements

  • Strong experience in silicon IP or subsystem-level architecture, microarchitecture, and
  • Owned hardware IP or subsystem designs from architectural definition through implementation and
  • Experience implementing hardware security features such as memory encryption, key management
  • Ability to translate functional and security requirements into hardware architectures, interfaces
  • Working knowledge of RTL design and coding proficiency in Verilog or SystemVerilog, with the
  • Ability to evaluate performance, power, area, and complexity tradeoffs across silicon designs.

๐ŸŽ Benefits

  • $287K โ€“ $485K annual salary
  • Equity compensation
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