Sr. ASIC Design Engineer (Silicon Engineering)

Added
3 hours ago
Type
Full time
Salary
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Related skills

python asic soc verilog systemverilog

๐Ÿ“‹ Description

  • Evaluate architectural trade-offs based on features, performance requirements and system limitations
  • Define micro-architecture, implement the RTL in Verilog/System Verilog, integrate that in top level
  • Work closely with verification team to ensure all aspects of the design are covered and verified
  • Provide timing constraint for those IPs and support the physical implementation team (synthesis
  • Participate in silicon bring-up and validation

๐ŸŽฏ Requirements

  • Bachelorโ€™s degree in electrical engineering, computer engineering, or computer science
  • 5+ years of experience in RTL implementation
  • Ability to solve complex problems including clock domain crossings and power optimization
  • ASIC/SoC system integration experience
  • Experience with embedded CPU subsystems
  • Experience with standard bus protocols (e.g. AXI, AHB, etc.)

๐ŸŽ Benefits

  • Base salary
  • Long-term incentives (company stock or long-term cash awards)
  • Potential discretionary bonuses
  • Employee Stock Purchase Plan
  • Comprehensive medical, vision, and dental coverage
  • 401(k) retirement plan
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