Sr. Design for Test (DFT) Engineer

📋 Description

• Create new chip, module, and system-level DFT solutions for photonics AI
• Develop and deploy DFT methodologies for next-gen products
• Architect integrated electronics/analog/digital test including ATPG and boundary scan
• Collaborate with RTL designers to define front-end integration
• Collaborate with physical-design engineers for backend integration
• Build automated, scalable test flows for the team

🎯 Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
• At least 5 years of industry experience in DFT for advanced ASIC designs
• Experience in pre-silicon design activities
• Ability to work independently on daily tasks while seeking guidance for new assignments
• Experience with scripting languages such as Python or TCL
• Solid understanding of DFT concepts such as Scan, ATPG, memory test, and JTAG

🎁 Benefits

• Comprehensive Health Care Plan (Medical, Dental & Vision)
• Retirement Savings Matching Program
• Life Insurance (Basic, Voluntary & AD&D)
• Generous Time Off (Vacation, Sick & Public Holidays)
• Paid Family Leave
• Short Term & Long Term Disability