Lead RFIC/analog layout discipline for multiple silicon projects.
Determine chip floor plan; power/ground distribution; pad locations with packaging.
Estimate layout schedule; flag complexity early.
Layout analog/RF blocks with matching; minimize parasitics.
DRC/ER/LVS checks and final tape-out with GDS sharing.
Collaborate with EDA vendors to trial new tools and share techniques.

🎯 Requirements

Bachelor's in Electrical or Computer Engineering.
5+ yrs IC layout experience; or 8+ yrs w/o degree; willing to work extended hours.
Strong analog layout skills.
Experience on 22nm/16nm/7nm/5nm nodes.
RF/analog layout up to 50 GHz; LNA, VCO, mixers.
Programming: Python, Perl; Linux; shell scripting; VCS.

Apply on employer's website

This employer gathers applications via their own applicant tracking system.

You will be redirected to an external application form.

Share job

Meet JobCopilot: Your Personal AI Job Hunter

Automatically Apply to Engineering Jobs. Just set your preferences and Job Copilot will do the rest — finding, filtering, and applying while you focus on what matters.

Activate JobCopilot