Sr. RFIC Layout Designer (RFIC Engineering)

📋 Description

• Work with IC designers to determine chip floor plan and pad locations.
• Estimate the layout schedule and flag complex areas early.
• Layout RF and analog blocks with attention to matching and parasitics.
• Run DRC, ERC and LVS checks and resolve errors.
• Integrate top-level layout with ESD structures, pad assembly and tape out.
• Collaborate with EDA suppliers to trial new tools.

🎯 Requirements

• Bachelor’s in electrical/computer engineering with 5+ years IC layout; or 8+ years in lieu.
• Strong analog layout skills.
• Experience with advanced nodes (22nm/16nm/7nm/5nm+).
• RF block layout experience up to 50 GHz.
• Skill programming (Python/Perl) and shell scripting.
• Linux knowledge and Git revision control.