Sr. Staff Physical Design Engineer

📋 Description

• Implement digital blocks from synthesis to physical verification using industry tools and flows
• Drive full-chip STA signoff, review constraints, and debug timing reports
• Optimize power while balancing area and performance
• Lead full-chip floorplanning, IO placement, and clock distribution
• Customize clock implementation for functional and test clocks
• Write TCL, Python, or Shell scripts to automate flows

🎯 Requirements

• Bachelor's in Electrical or Computer Engineering
• 12+ years of experience as a Physical Design Engineer
• Completed blocks or top-level physical design for large ASICs that taped out
• Thorough knowledge of timing closure, LVS/DRC closure
• Experience in TCL and Python
• Strong cross-functional teamwork and adaptability

🎁 Benefits

• Comprehensive Health Care Plan (Medical, Dental & Vision)
• Retirement Savings Matching Program
• Life Insurance (Basic, Voluntary & AD&D)
• Generous Time Off (Vacation, Sick & Public Holidays)
• Paid Family Leave
• Equity grants (applicable to full-time employees)