Contribute to SoC architecture development for high-performance, low-power IoT devices
Use SystemVerilog, Python, Tcl, UPF to bring designs to silicon and production
Collaborate with systems, RF, software, firmware, and verification teams
Support schedule/resource planning to deliver products on time
Define digital/system design methodologies and test strategies

🎯 Requirements

Theoretical and practical knowledge of SoC architectures with embedded processors
Familiarity with AXI/AHB/APB/OBI bus architectures
Deep RTL design knowledge (SystemVerilog)
Experience with multi-clock and multi-power-domain systems and power reduction strategies
Understanding timing constraints, STA, and timing closure
ARM TrustZone, device lifecycle states, Secure Boot, PSA Certified Level 2+ security
MS/PhD in EE/CS preferred

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