Staff Physical Design Engineer

📋 Description

• Implement digital blocks in advanced tech nodes from synthesis through physical verification, using industry standard tools and flows
• Understand and debug timing constraints, derates and margins. Review signoff STA reports and fix timing violations for all timing scenarios
• Build and customize power grid and ensure power integrity goals are met
• Understand clock details and be able to customize clock implementation for functional and test clocks
• Debug and clean up DRC/LVS
• Functional and timing ECO implementation

🎯 Requirements

• Bachelor’s in Electrical Engineering or Computer Engineering
• At least 8+ years of industry experience working as a Physical Design Engineer
• Must have completed blocks or top level physical design for large ASICs or mixed signal chips that taped out
• Thorough knowledge of timing closure, LVS/DRC closure
• Experience in TCL and Python (or other scripting languages)
• Strong teamwork skills with the ability to collaborate with multiple functional teams across a variety of fields

🎁 Benefits

• Comprehensive Health Care Plan (Medical, Dental & Vision)
• Retirement Savings Matching Program
• Life Insurance (Basic, Voluntary & AD&D)
• Generous Time Off (Vacation, Sick & Public Holidays)
• Paid Family Leave
• Short Term & Long Term Disability