Design and build instrumentation and onboard architecture to prevent, detect, and debug reliability
Develop long-term strategies to mitigate compute hardware reliability and numerical issues across
Lead cross-functional initiatives to architect proactive solutions addressing compilers (LLVM, XLA
Architect frameworks to identify and eliminate software/firmware faults (deadlocks, memory issues
Influence next-gen hardware platform design and reliability architecture as a technical authority.

🎯 Requirements

BS/MS in CS, EE, Robotics, Physics, Math, or related field (or equivalent).
Experience in C++.
Experience with CUDA/GPU/TPU acceleration and model reliability/optimization.
Experience with writing GPU kernels and evaluating GPU workloads.

🎁 Benefits

Competitive compensation and discretionary bonus program.
Equity incentive plan.
Generous company benefits program.
Collaborative, hybrid work environment.

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