Director, Logical Design

📋 Description

• Provide technical leadership for microarchitecture, RTL design and SoC integration, driving design
• Lead engineering execution and delivery of complex SoC designs, ensuring alignment with project
• Drive design quality and implementation readiness, including CDC/RDC, synthesis, timing closure and
• Collaborate with architecture, verification, DFT and physical design teams to resolve complex
• Identify and manage technical risks, resource requirements and cross-functional dependencies to
• Build, lead and develop a high-performing engineering team through coaching, mentoring, performance

🎯 Requirements

• Degree in Electronic Engineering, Computer Science or a related discipline with 18+ Years of
• Extensive experience in ASIC/SoC design and development, including technical leadership and
• Proven experience leading engineering teams through multiple complex SoC tapeouts, with end-to-end
• Strong expertise in digital design, microarchitecture, RTL development and complex SoC integration.
• In-depth knowledge of Verilog/SystemVerilog, SoC interconnect protocols and clock/reset
• Good understanding of synthesis, static timing analysis, CDC/RDC, low-power design and physical

🎁 Benefits

• Experience in high-performance, multicore or AI accelerator SoC development.
• Experience with advanced process technologies and physically aware RTL design.
• Knowledge of DFT methodologies, low-power design and multi-voltage domain integration.
• Experience with multi-die or chiplet-based SoC architectures.
• Knowledge of high-speed interfaces such as PCIe, DDR and Ethernet.
• Experience in silicon bring-up, post-silicon debugging and ECO implementation.