Research Intern: Scalable Fabrication of Superconducting Quantum Devices

📋 Description

• Fabricate superconducting qubits and Josephson tunnel junctions in a cleanroom environment.
• Prepare, edit, and verify CAD layout files.
• Develop and optimize lithography processes.
• Operate and assist with plasma etching processes (ICP/RIE).
• Electrical and structural characterization of fabricated structures.
• Analyze fabrication data to identify process trends and improve yield and uniformity.

🎯 Requirements

• Hands-on experience working in a semiconductor or nanofabrication cleanroom.
• Demonstrated experience with one or more lithography techniques, including photolithography or
• Demonstrated experience with dry etching techniques such as ICP and RIE.
• Fluent in one or more CAD layouts using GDSII-based tools (e.g., KLayout, LayoutEditor, Cadence
• Strong experimental skills and attention to detail.
• Ability to work independently while collaborating effectively in a fast-paced research environment.

🎁 Benefits

• Gain hands-on experience in the complete fabrication workflow for superconducting quantum circuits.
• Housing stipend up to $2,000 for candidates who relocate for the summer.